The following APIs are supported by PS11 VIP.
Data
| APIs | Inputs | Outputs |
|---|---|---|
write_data
Initiate a WRITE transaction (transfer size<= 16 bytes) on one of the AXI-Master ports. This calls the AXI VIP API. This task returns write response when the write transaction is completed. Example: |
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [43:0] start_addr: Write address [4:0] wr_size: Number of bytes to be written. Valid Write Sizes are:
Note: Transfer must not
cross the 16-byte boundary.
[127:0] w_data: Data to be written |
[1:0] response: The slave write response from
the following: [OKAY, EXOKAY, SLVERR, DECERR] |
read_data
Initiate a READ transaction (transfer size<= 16 bytes) on one of the AXI-Master ports. This calls the AXI VIP API. This task returns data and response when the read transaction is completed. Example: |
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [43:0] start_addr: Read address [4:0] rd_size: Number of bytes to be read
Note: Transfer must not
cross the 16-byte boundary.
|
[127:0] rd_data: Valid Data from the slave [1:0] response: The slave read response from the following: [OKAY, EXOKAY, SLVERR, DECERR] |
write_data_32
Initiate a WRITE transaction of 4 bytes on one of the AXI-Master ports. This calls the AXI VIP API. This task returns write response when the write transaction is completed. Example: |
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [43:0] start_addr: write address [31:0] w_data: Data to be written |
[1:0] response: The slave write response from
the following: [OKAY, EXOKAY, SLVERR, DECERR] |
write_data_64
Initiate a WRITE transaction of 8 bytes on one of the AXI-Master ports. This calls the AXI VIP API. This task returns write response when the write transaction is completed. Example: |
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [43:0] start_addr: write address [63:0] w_data: Data to be written |
[1:0] response: The slave write response from
the following: [OKAY, EXOKAY, SLVERR, DECERR] |
read_data_32
Initiate a READ transaction of 4 bytes on one of the AXI-Master ports. This calls the AXI VIP API. This task returns data and response when the read transaction is completed. Example:
|
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [43:0] start_addr: Read address |
[31:0] rd_data: Valid Data from the slave [1:0] response: The slave read response from the following: [OKAY, EXOKAY, SLVERR, DECERR] |
read_data_64
Initiate a READ transaction of 8 bytes on one of the AXI-Master ports. This calls the AXI VIP API. This task returns data and response when the read transaction is completed. Example:
|
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [43:0] start_addr: Read address |
[63:0] rd_data: Valid Data from the slave [1:0] response: The slave read response from the following: [OKAY, EXOKAY, SLVERR, DECERR] |
Burst
| APIs | Inputs | Outputs |
|---|---|---|
write_burst
Initiate a single AXI write burst transaction (transfer size<= 128 bytes) on one of the AXI-Master ports. This calls the AXI VIP API. This task returns write response when the write transaction is completed. Example: |
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_AP [43:0] start_addr: Write address len: Burst Length siz: Burst Size burst: Burst Type lck: Lock Type 0x0: No Lock Support cache: Cache Type 0x0: No cache support prot: Protection Type 0x0: No Protection Support [32767:0] data: Data to be sent datasize: Number of bytes (max 256 bytes) |
[1:0] response: The slave write response from
the following: [OKAY, EXOKAY, SLVERR, DECERR] |
read_burst
Initiate a single AXI read burst transaction (transfer size<= 128 bytes) on one of the AXI-Master ports. This calls the AXI VIP API. This task returns data and response when the read transaction is completed. Example: |
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [43:0] start_addr: Read address len: Burst Length siz: Burst Size burst: Burst Type lck: Lock Type 0x0: No Lock Support cache: Cache Type 0x0: No cache support prot: Protection Type 0x0: No Protection Support |
[32767:0] rd_data: Valid Data from the slave [1:0] response: The slave Read response from the following: [OKAY, EXOKAY, SLVERR, DECERR] |
File
| APIs | Inputs | Outputs |
|---|---|---|
write_from_file
Initiate an AXI write transaction on one of the AXI-Master ports. The write data is used from the file. Burst type used is INCR. This is a blocking task and returns only after the completion of AXI WRITE transaction. Need to pass FILE_DATA_WIDTH_128 for accessing files with 128-bit data contents. If FILE_DATA_WIDTH_128 is passed, then the address must be 128-bit aligned. If FILE_DATA_WIDTH_128 is not passed, then the address must be 32-bit aligned. Example:
|
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [1023:0] File_name: File name that stores the write data. [43:0] start_addr: write address [31:0] wr_size: number of bytes to be written For 32-bit file contents, wr_size must be in multiples of 4. For 128-bit file contents, wr_size must be in multiples of 16. |
[1:0] response: The slave write response from
the following: [OKAY, EXOKAY SLVERR, DECERR] |
read_to_file
Initiate an AXI read transaction on one of the AXI-Master ports. The read data is written to a file. Burst type used is INCR. This is a blocking task and returns only after the completion of AXI READ transaction. Need to pass FILE_DATA_WIDTH_128 for accessing files with 128-bit data contents. If FILE_DATA_WIDTH_128 is passed, then the address must be 128-bit aligned. If FILE_DATA_WIDTH_128 is not passed, then the address must be 32-bit aligned. Example:
|
[1023:0] master_name: Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [1023:0] file_name: File name that stores the write data. [43:0] start_addr: write address [31:0] rd_size: number of bytes to be read. For 32-bit file contents, rd_size must be in multiples of 4. For 128-bit file contents, rd_size must be in multiples of 16. |
[1:0] response: The slave write response from
the following: [OKAY, EXOKAY,SLVERR, DECERR] |
Preload
| APIs | Inputs | Outputs |
|---|---|---|
pre_load_mem
Preload OCM with random_data/all_zeros/all_ones. Based on the address and data type specified, the data is loaded in OCM. Address must be 32-bit aligned. Example: |
[1:0] data_type: Random, zeros or ones.
[43:0] start_addr: Start Address from where OCM must be initialized with the data [31:0] no_of_bytes: Number of data bytes to be loaded |
None |
pre_load_mem_from_file
Preload OCM with data from a file. Based on the address specified, the data is loaded in OCM. Example: |
[1023:0] file_name: File name (max. 256 characters) [43:0] start_addr: Start Address from where OCM must be initialized with data from the file. [31:0] Num lines: Number of lines (each row must match 32 bits) |
None |
Memory
| APIs | Inputs | Outputs |
|---|---|---|
peek_mem_to_file
This reads from the OCM and prints to a file. Example:
|
[1023:0] file_name: File name (max. 128
characters; Read data is written to this file). [43:0] start_addr: Start Address to read the data from. [31:0] no_of_bytes: Number of data bytes to be read. |
None |
write_mem
Backdoor write to the OCM memory. Based on the address specified, the data is written to OCM. Address must be 32-bit aligned. Example: |
[8191:0] data: Write data to be written to
memory. [43:0] start_addr: Start Address to write the data from. [15:0] no_of_bytes: Number of data bytes to be write (max. 128 bytes). |
None |
read_mem
Backdoor read from the OCM memory. Based on the address specified, the data is read from OCM. Example: |
[43:0] start_addr: Start Address to read the
data from. [15:0] no_of_bytes: Number of data bytes to be read. |
[8191:0] data: read data from memory. |
Clock
| APIs | Inputs | Outputs |
|---|---|---|
ps_gen_clock
This API generates the interface clocks from PS11 VIP. By default, there is a 1 GHz clock on all the PS11 VIP output clock ports. Example: It generates a 50 MHz clock on PS11LNOCPS11LCCIAXI0CLK. |
[1023:0] clk_name: Clock name can be any of the following: PMCRCLKCLK3 PMCRCLKCLK2 PMCRCLKCLK1 PMCRCLKCLK0 LPDCPMINREFCLK MMITOPSWCLK PSAXICFGCLK NOCCLK PS11LNOCPMXAXI0CLK PS11LNOCPS11LCCIAXI0CLK PS11LNOCPS11LCCIAXI1CLK PS11LNOCPS11LCCIAXI2CLK PS11LNOCPS11LCCIAXI3CLK PS11LNOCPS11LPCIAXI0CLK PS11LPMXNOCAXI0CLK PS11LPS11LNOCCCIAXI0CLK PS11LPS11LNOCCCIAXI1CLK PS11LPS11LNOCCCIAXI2CLK PS11LPS11LNOCCCIAXI3CLK PS11LPS11LNOCCCIAXI4CLK PS11LPS11LNOCCCIAXI5CLK PS11LPS11LNOCCCIAXI6CLK PS11LPS11LNOCCCIAXI7CLK PS11LPS11LNOCISOCAXICLK PS11LPS11LNOCPCIAXI0CLK PS11LPS11LNOCPCIAXI1CLK PS11LPS11LNOCPCIAXI2CLK PS11LPS11LNOCPCIAXI3CLK PS11LPS11LNOCRPUAXI0CLK [31:0] freq_in_mhz: This can be any integer value |
None |
ps11_vip_gen_clock
Example: It generates a 50 MHz clock on ps11_vip_clock. |
[31:0] frequency_in_mhz: This can be any integer value | None |
pl_gen_clock
This API generates the PS11 to PL clocks with the frequency in MHz as the input along with the clock port number. Example: |
[1:0] clk_num:
[31:0] freq_in_mhz: This can be any integer value |
None |
Reset
| APIs | Inputs | Outputs |
|---|---|---|
por_reset
Soft reset for VIP. A required reset. Active-Low reset. Example:
|
por_reset_ctrl: 1-bit input reset to VIP. por_reset_ctrl is active-Low input. | None |
pl_gen_reset
This API asserts the PS11 to PL resets. Example: |
[3:0] reset_ctrl Depending on the reset_ctrl value, one of the reset is asserted. reset_ctrl is active-Low input. Example:
Any combination above is also possible. |
None |
Interrupt
| APIs | Inputs | Outputs |
|---|---|---|
read_interrupt
Use this API to poll the interrupt status at any given time. This is a non-blocking task to poll the interrupt status and returns immediately with current state on interrupt lines. Example: It returns the interrupt status (16-bit) for {PLPSIRQ1,PLPSIRQ0}. |
None | [15:0] irq_status: Interrupts generated by PL. |
wait_interrupt
Use this API to wait for any of the interrupt to occur. This is a blocking task to wait for an interrupt to occur and returns immediately with any of the four interrupt lines asserts. Example:
Example:
|
[3:0] irq: Interrupt line number irq: 0 → PLPSIRQ0[0], 1 → PLPSIRQ0[1], 2 → PLPSIRQ0[2], 3 → PLPSIRQ0[3], 4 → PLPSIRQ0[4], 5 → PLPSIRQ0[5], 6 → PLPSIRQ0[6], 7 → PLPSIRQ0[7, 8 → PLPSIRQ1[0], 9 → PLPSIRQ1[1], 10 → PLPSIRQ1[2], 11 → PLPSIRQ1[3], 12 → PLPSIRQ0[4], 13 → PLPSIRQ0[5], 14 → PLPSIRQ1[6], 15 → PLPSIRQ1[7]. |
[15:0] irq_status: Interrupts generated by PL. irq_status = {PLPSIRQ1[7:0],PLPSIRQ0[7:0]}. |
trigger_interrupt
Use this API to trigger an interrupt pin (IRQFPD/IRQLDP/IRQPMC) of the PL. This is a non-blocking task for triggering the interrupts. Example: |
[1:0] intr_type: To specify either
IRQFPD/TRQLPD/IRQPMC
[7:0] interrupt_no: Interrupt pin number/index of the particular index type. Example: If, intr_type: 10 and interrupt_no: 32, then IRQLPD[32] is triggered. |
None |
clear_interrupt
Use this API to clear an interrupt pin (IRQFPD/IRQLDP/IRQPMC) of the PL. This is a non-blocking task for clearing the interrupts. Example: |
[1:0] intr_type: To specify either
IRQFPD/TRQLPD/IRQPMC
[7:0] interrupt_no: Interrupt pin number/index of the particular index type. Example: If, intr_type: 10 and interrupt_no: 32, then IRQLPD[32] is cleared. |
None |
Address Range
| APIs | Inputs | Outputs |
|---|---|---|
cfg_slverr_address_range
This API call sets an address range for which SLVERR response is expected. This API can be called multiple times for multiple such address ranges. It also prints all the configured SLVERR address ranges. Example: |
[63:0] slverr_start_address [63:0] slverr_end_address set_slv_error
|
None |
Register
| APIs | Inputs | Outputs |
|---|---|---|
read_register
This API call is for reading a 32-bit register value. Example:
|
[31:0] addr: Register address | [31:0] DATA: Valid register read data. |
write_register
This API is for performing backdoor register write. Example: |
[31:0] addr: Register address [31:0] data: Data to be written to the register int size: Number of bytes to be written. Possible values are 1, 2, 3, and 4 only. |
None |
Warning
| APIs | Inputs | Outputs |
|---|---|---|
fatal_to_warning
This API is used to convert the FATAL messages reported for the components APU0_API, APU1_API, APU2_API, APU3_API. RPUA_API, RPUB_API, OCM0, OCM1 and REG space. Example:
|
[1023:0] component_name Permitted Component Names are:
|
None |
Data Width
| APIs | Inputs | Outputs |
|---|---|---|
select_pl_datawidth
Example:
|
[1:0] prog_data_width:
[1023:0] pl_port_name LPD_AXI_PL/FPD_AXI_PL/PL_AXI_FPD0/PL_AXI_FPD1/PL_AXI_FPD2/PL_AXI_FPD3/PL_AXI_LPD |
None |
QoS
| APIs | Inputs | Outputs |
|---|---|---|
set_isoc_qos_value
This API sets the QoS value for the ISOC ports. Transactions towards DDR with QoS value matching this programmed QoS values are sent onto ISOC port. Example: |
[3:0] qos_value: QoS value for ISOC port | None |
set_awqos
Example: |
[1023:0] name Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [3:0] value Any integer value from 0 to 15 that is to be driven from the internal master |
None |
set_arqos
Example: |
[1023:0] name Valid Master Port Names APU0_API, APU1_API, APU2_API, APU3_API, RPUA_API, RPUB_API, PPU0_API, PPU1_API [3:0] value Any integer value from 0 to 15 that is to be driven from the internal master |
None |