PCIe Reference Clocks

PCIe Reference Clocks - DS1016

Alveo UL3422 Ultra Low Latency Trading Data Sheet (DS1016)

Document ID

DS1016

Release Date

2024-10-14

Revision

1.0 English

The following two clocks are provided to support PCIe clocking.

Table 1. PCIe Reference Clocks
Clock Source	Description
PCIe Edge Connector	100 MHz clock originating from the PCIe edge connector and connected to GTY 225 MGTREFCLK0 inputs. The clock signal is AC coupled.
Internal clock generator	100 MHz clock originating from the Renesas RC21008AQ clock generator and connected to GTY 225 MGTREFCLK1 inputs. The clock signal is AC coupled and meets PCIe Gen3/Gen4 jitter specifications.