The Alveo UL3422 card has a PCIe Gen4 x8 interface compliant with PCIe CEM 4.0 configured as a PCIe Endpoint. It has a PCIe x16 physical connector with the upper eight lanes unconnected and does not support bifurcation.
For information about PCIe FPGA bank allocation and clocking details, see FPGA Bank I/O Mapping and Clocking. Detailed AMD UltraScale+™ device and PCIe pin connections can be found at UL3422 Early Access Secure Site.