The following table lists the ADK2 debug connector pin signals for the UL3422 card.
Note: Both SC and SUC are synonymous with
satellite controller.
| Pin | Description | Pin | Description |
|---|---|---|---|
| A1 | No Connect | B1 | FPGA_JTAG_VREF (+3V3_SYS) |
| A2 | No Connect | B2 | FPGA _JTAG_TCK |
| A3 | No Connect | B3 | FPGA _JTAG_TMS |
| A4 | No Connect | B4 | FPGA _JTAG_TDI |
| A5 | No Connect | B5 | FPGA _JTAG_TDO |
| A6 | No Connect | B6 | No Connect |
| A7 | No Connect | B7 | No Connect |
| A8 | GND | B8 | GND |
| A9 | No Connect | B9 | +3V3_SYS_FPGA |
| A10 | No Connect | B10 | FPGA_UART1_RXD |
| A11 | No Connect | B11 | FPGA_UART1_TXD |
| A12 | GND | B12 | No Connect |
| A13 | ALL_PSU_ON_R | B13 | SUC_ DEBUG _RXD |
| A14 | SUC_JTAG_TCK | B14 | SUC_ DEBUG _TXD |
| A15 | No Connect | B15 | No Connect |
| A16 | SUC_JTAG_TDI | B16 | No Connect |
| A17 | SUC_JTAG_TMS | B17 | No Connect |
| A18 | SUC_JTAG_TDO | B18 | No Connect |
| A19 | FPGA_MODE_CNTRL | B19 | No Connect |
| A20 | No Connect | B20 | +3V3_AUX |
| A21 | PMBus_SDA | B21 | SMBUS_SDA |
| A22 | PMBus_SCL | B22 | SMBUS_SCL |
| A23 | PMBus_ALERTB | B23 | No Connect |
| A24 | GND | B24 | GND |
| A25 | DDR4_VPP, divided 1:2 divided 2:5 | B25 | VCCINT (0.9V) |
| A26 | +3V3_SYS_AUX, divided 1:2 | B26 | +1V8_MGT VCCAUX |
| A27 | 5V0, divided 1:5 | B27 | 0V9_MGTAVCC |
| A28 | 1V8_SYS | B28 | 1V2_MGTAVTT |
| A29 | 1V5_SYS | B29 | 1V2_VCCO |
| A30 | DMB_PRSNT_B | B30 | GND |