While transceivers in the Versal portfolio have a similar naming convention to UltraScale+ device transceivers, there are subtle differences in capabilities and implementation. The following table covers the high-level summary of the Versal device transceivers.
| Feature | Versal Device GTY or GTYP Transceivers | Versal Device GTM Transceivers |
|---|---|---|
| Line rate 1 | NRZ: 1.2–32.75 Gb/s | PAM4: 76–112 Gb/s, 38–58 Gb/s, 19–29 Gb/s
NRZ: 19–29 Gb/s, 9.5–15 Gb/s |
| Organization | Quad TX/RX channels bifurcated into two duals | Quad TX/RX channels |
| Ring PLL (RPLL) | 1 dedicated to each dual
1.2–12.5 Gb/s |
N/A |
| LC PLL | 1 dedicated to each dual
1.2–32.75 Gb/s |
2 per quad |
| Reference clock sources | 2 input buffers per quad with sharing from up to 2 quads north and south | 2 input buffers per quad with sharing from up to 2 quads north and south |
| Integrated PCS features |
|
PRBS pattern generator and checker |
| Examples uses: | Backplane, PCIe, 10G, 25G, 50G, 100G Ethernet, Interlaken | Backplane, 10G, 25G, 50G, 100G, 200G, 400G Ethernet, OIF CEI-56G, CPRI 48G |
| Found in some of these devices: | Versal AI Core Series, Versal AI Edge Series, Versal Prime Series, Versal Premium Series, Versal HBM Series | Versal Prime Series, Versal Premium Series, Versal HBM Series |
| Documentation | Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002) | Versal Adaptive SoC GTM Transceivers Architecture Manual (AM017) |
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