An example design demonstrating the usage of a specific transceiver configuration can be created after using the transceivers wizard. Choose the Open IP Example Design option in the Vivado tool by right-clicking on the on the IP instance in the sources window. This action creates and opens a separate Vivado project that demonstrates the basic power-on-reset sequence of the transceiver and shows link functionality using PRBS pattern generators and checkers.
The example design project can be used as a simulation reference, or it can be created as a simplified in-system integrated bit error rate test (IBERT) design for stand-alone testing of transceiver interfaces and signal integrity before the rest of the design is finish.
Both the example design and IBERT are documented in the respective transceiver wizard product guides listed in the previous table. Additionally, creating a stand-alone IBERT design is documented the Serial I/O Hardware Debugging Flows section of the Vivado Design Suite User Guide: Programming and Debugging (UG908).