To convert a primitive element instantiated in HDL code, locate the equivalent primitive element in the following guides:
- UltraScale Architecture Libraries Guide (UG974)
- Versal Architecture Prime Series Libraries Guide (UG1344)
- Versal Architecture Premium Series Libraries Guide (UG1485)
- Versal Architecture AI Core Series Libraries Guide (UG1353)
These user guides provide VHDL and Verilog instantiation templates for each AMD primitive and information about how to use them. Be sure to note any differences in the functionality or pin naming of the Altera primitive versus the equivalent AMD primitive and adjust the design appropriately.