The AMD Vivado™ Design Suite is a productivity-enhancing tool suite for designing, integrating, and implementing systems with various AMD devices. It addresses the challenges of larger, more complex devices featuring new technologies like stacked silicon interconnects, high-speed I/O interfaces, and embedded microprocessors. The Vivado Design Suite accelerates design implementation with analytical optimization tools for multiple metrics and provides design analysis at each stage, reducing iterations, and enhancing productivity.
Download Vivado IDE from the Unified Installer webpage. Refer to the Vivado Design Suite Implementation Design Hub (DH229) for design-related references and links.
- Unified design environment
-
Vivado Design Suite provides a fully integrated design
environment where all the key steps—such as design entry, synthesis, implementation,
simulation, and bitstream/PDI generation—are managed in one tool (see
Vivado Design Suite User Guide: Getting
Started (UG910)). Vivado IDE includes the Vivado simulator,
which is a hardware description language (HDL) simulator that lets the user perform
behavioral, functional, and timing simulations for VHDL, Verilog, SystemVerilog, and
mixed-language designs. This results in a streamlined workflow for FPGA and adaptive SoC
development.
While Quartus integrates design steps, Vivado design tools offer a more modern, user-friendly interface with better tool integration, particularly for complex designs involving IP cores and custom logic. Quartus also does not include a built-in simulator.
- IP catalog and customization
- Vivado tools have a robust IP catalog with a large collection of pre-built, highly optimized intellectual property (IP) cores for various applications such as communication, processing, and peripherals. The customization options in the Vivado IP integrator provide extensive integration capabilities for custom IP and block design creation.
- Design optimization and performance
- Vivado tool implementation is a constraint-driven optimization, placement, and routing process with algorithms matched to your target device. Implementation provides a rich set of options, compilation strategies, and iterative timing closure flows to help you meet design goals.
- Dynamic Function eXchange
- Vivado tools support Dynamic Function eXchange, allowing you to reconfigure only certain regions of the AMD device while the rest of the device continues to function. This is beneficial for applications requiring dynamic reconfiguration because it reduces the amount of time the device needs to be reprogrammed.
- Advanced debugging and analysis tools
- Vivado tools include robust debugging tools such as the integrated logic analyzer (ILA), virtual I/O (VIO), and ChipScope™ software provide for real-time signal analysis and debugging. These tools allow for efficient in-system debugging of FPGA designs.
- Design flow and automation
- Vivado tools support automation through Tcl scripting, which allows you to automate the design flow and customize various steps in the design process. This is particularly useful for large-scale designs or repetitive tasks.
- Timing analysis and constraints
- The Vivado clock interaction report and timing constraints editor are advanced tools for ensuring complete and correct timing requirements. Vivado tools also support powerful interactive cross-probing between timing reports, physical views, logic schematics, and HDL source descriptions.
- Support for AMD specific features
- Vivado tools are tailored specifically for AMD devices (including the AMD Zynq™ 7000 series, AMD UltraScale™ , AMD UltraScale+™ , and AMD Versal™ devices). It integrates seamlessly with AMD proprietary technologies such as AMD Vitis™ HLS, AMD IP, and Zynq development boards (ZCUxxx).
- Additional AMD embedded software tools
- In addition to Vivado tools, AMD offers a range of embedded software tools that enables the development of embedded software and accelerated applications on heterogeneous AMD platforms.
- Vitis unified software platform
- Software development platform designed for programming AMD devices, providing unified environment for developing applications using high-level languages like C, C++, and Python, and OpenCL™ for hardware acceleration. The Vitis tools combines software and hardware development in a single tool chain.
- Vitis HLS
- Vitis HLS is a high-level synthesis tool that allows designers to create FPGA and adaptive SoC designs from high-level programming languages like C, C++, and SystemC.
- Vitis model composer
- A model-based design tool that enables rapid design exploration within the MathWorks MATLAB® and Simulink® software.
- Vitis embedded
- A standalone embedded software development package for developing and compiling C/C++ software for an AMD embedded processing subsystem ( Arm® and MicroBlaze™ processors) in AMD devices.
- Vitis AI software
- An AI Inference development platform for AMD devices, boards, and AMD Alveo™ data center acceleration cards.
Additional details regarding the software development flow can be found in the SoC Conversion section.
The Vitis unified software platform includes a variety of tools to complete the AMD embedded system development process, including integration with Vivado tools and support for AI applications.