Memory Insertion - UG1192

AMD Design Conversion for Altera FPGAs and SoCs Methodology Guide (UG1192)

Document ID
UG1192
Release Date
2025-07-15
Revision
3.0.1 English

Memory arrays can be constructed using the IP catalog, parameterizable macros (XPM), RTL language templates, inference, or by direct instantiation of memory primitives. The direct instantiation approach is not recommended as it is the least flexible of the methods.