Maximum Performance - UG1192

AMD Design Conversion for Altera FPGAs and SoCs Methodology Guide (UG1192)

Document ID
UG1192
Release Date
2025-07-15
Revision
3.0.1 English

The maximum performance of the clock networks is listed in the data sheets for each device family/series.

  • Versal Premium Series Data Sheet: DC and AC Switching Characteristics (DS959)
  • Versal AI Edge Series Data Sheet: DC and AC Switching Characteristics (DS958)
  • Versal AI Core Series Data Sheet: DC and AC Switching Characteristics (DS957)
  • Versal Prime Series Data Sheet: DC and AC Switching Characteristics (DS956)
  • Versal HBM Series Data Sheet: DC and AC Switching Characteristics (DS960)
  • Zynq UltraScale+ RFSoC Data Sheet: DC and AC Switching Characteristics (DS926)
  • Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS923)
  • Zynq UltraScale+ MPSoC Data Sheet: DC and AC Switching Characteristics (DS925)
  • Kintex UltraScale+ FPGAs Data Sheet: DC and AC Switching Characteristics (DS922)
  • Artix UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS931)
  • Spartan UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics (DS930)
  • Virtex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics (DS893)
  • Kintex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics (DS892)