These AMD user guides and videos provide detailed information about the Vivado logic analyzer tool:
- For more information on programming and debugging options in the Vivado Design Suite, see the Vivado Design Suite User Guide: Programming and Debugging (UG908).
- For more information on available Tcl commands in the Vivado Design Suite, see the Vivado Design Suite Tcl Command Reference Guide (UG835).
- For more information on the customizable integrated logic analyzer (ILA) IP core, see the Integrated Logic Analyzer LogiCORE IP Product Guide (PG172).
- For more information on the virtual input/output (VIO) core that can both monitor and drive internal FPGA signals in real time, see the Virtual Input/Output LogiCORE IP Product Guide (PG159).
- For more information on the JTAG to AXI master customizable core, see the JTAG to AXI Master LogiCORE IP Product Guide (PG174).
Video: For more information about the logic
debug features in the Vivado tools, how to add logic debug IP
to a design, and how to use the Vivado logic analyzer to
interact with logic debug IP, see the Logic
Debug in Vivado video.
Video: For more information on how to use
the Vivado tools to debug at and around device startup, see
the Debugging at Device Startup video.