For UltraScale device clock routing and distribution description, see the clock structure section of UltraScale Architecture Clocking Resources User Guide (UG572). For Versal devices, for the clock routing and distribution description, see the Clock Routing Structure and Resources section of Versal Adaptive SoC Clocking Resources Architecture Manual (AM003). This clock routing structure allows for everything from chip-wide clocks to clocks local to a clock region with low skew. Vivado tools usually handle clock routing and distribution without your intervention. There are clock properties references listed in the following section to help the tools in advanced use cases or cases where the Vivado tools cannot determine optimal clock placement.