Analog Mixed Signal - UG1192

AMD Design Conversion for Altera FPGAs and SoCs Methodology Guide (UG1192)

Document ID
UG1192
Release Date
2025-07-15
Revision
3.0.1 English

Every AMD UltraScale FPGA and UltraScale+ FPGA contains a system monitor block (SYSMON) that contains on-chip temperature and supply sensors, as well as up to 17 external analog inputs and an integrated analog-to-digital converter (ADC).

The AMD Artix-7/Spartan-7 FPGAs and Zynq 7000 SoCs contain a high performance analog mixed signal block called the AMD analog-to-digital converter (XADC). The XADC has the same functionality as the SYSMON in UltraScale FPGAs, but with the addition of dual 12-bit 1 MSPS ADCs.

The following table shows a comparison of the analog mixed signal (AMS) capabilities for AMD and Altera. For more details on the SYSMON, see the UltraScale Architecture System Monitor User Guide (UG580). For more details on the XADC, see the 7 Series FPGAs and Zynq 7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide (UG480).

Table 1. AMD and Altera AMS Comparison
  AMD Artix 7/ Spartan 7 FPGA AMD Zynq 7000 SoC AMD UltraScale/ UltraScale+ FPGA Altera Cyclone V FPGA Altera Cyclone V SoC FPGA Altera Arria 10 FPGA
Temperature Sensor ±4°C max ±4°C max ±4°C max No No Yes
On-chip supply sensor ±1% max ±1% max ±1% max No No Yes
External Analog Inputs Up to 17 Up to 17 Up to 17 No No 2
Dual 1 MSPS ADC Yes Yes No No No