The AMD AI Engines (AIEs) are an array of innovative very long instruction word (VLIW) and single instruction, multiple data (SIMD) processing engines and memories, all interconnected with 100s of terabits per second of interconnect and memory bandwidth.
The AIE array is the top-level hierarchy of the AIE architecture. It integrates a two-dimensional array of AIE tiles. Each AIE tile integrates a very-long instruction word (VLIW) processor, integrated memory, and interconnects for streaming, configuration, and debug. The AIE array interface enables the AIE to communicate with the rest of the Versal device through the NoC or directly to the PL. The AIE array also interfaces to the processing system (PS) and platform management controller (PMC) through the NoC. Further details of the hardware can be found in the AI Engine Architecture Manuals.