Video interface operates on the video clock. Each s0~s3 has its own separate video clock source.
- DC bypass mode
- Display controller is bypassed in this mode, vp0/1 DownSizer is just a passthrough flop for s0p0~s0p3. s0p0-s0p3 pipeline delay to DP must be matched in bypass mode. S1p0-s1p1 pipeline delay to the DP must be matched in bypass mode.
- DC functional mode
- Vp0 Downsizer merges 300Mhz streams of s0p0, s0p1 into a 600mhz stream and feeds it to display controller. Vp1 Downsizer merges 300Mhz streams of s0p2, s0p3 into a 600mhz stream and feeds it to the display controller. The display controller is in function.