Introduction
The USB and display port (DP) are part of the USB/DP/HDCP subsystem (UDH), which also includes an HDCP controller and USB 3.2. Refer to the following figure for the subsystem block diagram. Note the display controller module will be covered in a later section.
There are five key building blocks: a Display Controller, a DP/eDP TX 1.4 controller, a HDCP controller, USB 3.2 Gen 2x1 Dual Role Device (DRD) controller, and USB3 PHY and related components. The HDCP controller requires a True Random Number Generator (TRNG) module as well as key management module for proper operation.
A max video resolution of up to 4k60p will be supported through the DP. the DP can be configured as a x1, x2, or x4 link. Max raw bandwidth for a x4 DP link is 32.4 Gb/s (HBR3) with an effective bandwidth of 25.92 Gb/s. Over a Type-C connector, several modes of operation are permitted including simultaneous transmission of USB and DP data, as shown in the following table.
| Type-C Name | TX1 +/- | RX1 +/- | TX2 +/- | RX2 +/- | |
|---|---|---|---|---|---|
| Connector Orientation | USB TX DP TX | USB RX or DP TX | USB TX DP TX | USB RX or DP TX | Mode |
| Type-C normal | SS/SS+ | SS/SS+ | Not used | Not used | USB 3.2 Gen 2x1 only |
| Type-C flipped | Not used | Not used | SS/SS+ | SS/SS+ | |
| Type-C normal | SS/SS+ | SS/SS+ | DP ML1 | DP ML0 | USB and DP (1, 2 lanes) |
| Type-C flipped | DP ML1 | DP ML0 | SS/SS+ | SS/SS+ | |
| Type-C normal | DP ML2 | DP ML3 | DP ML1 | DP ML0 | DP only (1, 2, 4 lanes) |
| Type-C flipped | DP ML1 | DP ML0 | DP ML2 | DP ML3 |