SWDT I/O Interface Signals - SWDT I/O Interface Signals

SWDT I/O Interface Signals - SWDT I/O Interface Signals - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID

AM026

Release Date

2025-12-23

Revision

1.3 English

The prefix on the SWDT I/O signal names are mapped to the watchdog timer instances:

The I/O interface signals for the SWDT[0,1] are available on the PMC and LPD MIO pins as shown in the following table and in the tables in the MIO-at-a-Glance Tables section. The signals are described in the Signals to the Timer section.

Table 1. SWDT Controller I/O Interface Signals
Signal Name	MIO		EMIO
Signal Name	MIO-at-a-Glance Table	I/O	Signal Name	I/O
SWDTx_CLK	CLK	I		I
SWDTx_RST	RST	O	EMIOWDTRESET	O
SWDTx_RST_PEND	PEND	O	EMIOWDTRESETPENDING	O
SWDTx_INT	INT	O	EMIOWDTINTERRUPT	O
SWDTx_GWS0	WS0	O	EMIOGWDTWS	O
SWDTx_GWS1	GWS1	O	EMIOGWDTWS	O
SWDTx_ERROR	-	-	EMIOWDTERRTOPL	O