The real-time processing unit (RPU) consists of a multiprocessor subsystem based on the Arm® Cortex®-R52 CPU cores. The RPU has an associated general-purpose interrupt controller (GIC). Each core has three tightly-coupled memories (TCMs).
The RPU is located in the low-power domain (LPD) with the PMC. These subsystems can provide a safe and reliable system in a low-power mode with a high-performance SoC.
Note: For device-specific
features, such as RPU cluster configuration and on-chip memory details, see the
Versal
Architecture and Product Data Sheet: Overview (DS950).