RPU Subsystem Block Diagram - RPU Subsystem Block Diagram - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English
Figure 1. RPU Subsystem Block Diagram
Note: The figure shows an example set of RPU clusters with on-chip memory. For device-specific features, such as RPU cluster configuration and on-chip memory details, see the Versal Architecture and Product Data Sheet: Overview (DS950).