The RPU subsystem includes the Cortex-R52 MPCore processors with their tightly-coupled memories (TCMs), OCM memory, and I/O peripherals (IOP).
Figure 1. RPU Subsystem Interconnect Diagram
Note: The figure shows an
example set of RPU clusters with on-chip memory. For device-specific features, such
as RPU cluster configuration and on-chip memory details, see the
Versal
Architecture and Product Data Sheet: Overview (DS950)