RMII Interface Signals via MIO - RMII Interface Signals via MIO - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)
Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The following table lists the GEM RMII signals.

Table 1. GEM Controller RMII Interface Signals via MIO
PHY Signal I/O MIO-at-a-Glance Table
GEMx_TX_CLK Output TX CLK
GEMx_TX_EN Output TX CTL
GEMx_TXD[0:1] Output TXD [0:1]
GEMx_RX_CLK Input RX CLK
GEMx_DV Input RX CTL
GEMx_RXD[0:1] Input RXD [0:1]