QSPI Flash Boot Mode - QSPI Flash Boot Mode - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

QSPI boot mode supports a single flash (1-bit, 2-bit, or 4-bit data bus width configuration), dual stacked flash (4-bit data bus configuration), or dual-parallel flash (8-bit data bus configuration). The device supports a 24-bit addressing mode (QSPI24) boot mode or a 32-bit addressing (QSPI32) boot mode option. The QSPI32 boot mode option addresses flash sizes that are greater than 128 Mb. The single data rate (SDR) mode is used during the RCU BootROM execution. The PLM can reprogram the interface for faster accesses. For additional information on the quad SPI controller, see the Quad SPI Controller chapter.

Note: The Boot Search Limit section describes the search limits.

Boot Mode Setups

The following table lists the QSPI boot mode setups that are supported.

Table 1. Boot Mode Setups
Quad SPI Setup Flash Device Count Chip Select Count Data Width Max
Single (1-bit, 2-bit, 4-bit) 1 1 4
Dual-stacked 1 (1-bit, 2-bit, 4-bit) 2 2 4
Dual-parallel (8-bit) 2 2 8
  1. When using the QSPI dual-stacked boot mode, the BootROM can only access the lower QSPI addressable flash memory space for boot. After the BootROM execution, the PLM can access the upper QSPI flash for additional image storage.

The boot mode image search limits are listed in Table 1.