Programming Steps - Programming Steps - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

This section provides the steps for configuring the DMA controller. Be sure to follow the guidance provided in the Configuration Restrictions section.

  1. Configure the I/O interface.
  2. Configure the DMA controller:
    1. Program the DMA_DST_ADDR_L and DMA_DST_ADDR_H registers with the destination address in main memory; must be word aligned.
    2. Program the DMA_SRC_ADDR register to be the same as the Indirect_Trig_Addr register.
    3. Program the DMA_DST_SIZE with the number of words to be transferred (word aligned). This should be the same as the Indirect_Read_Num register.
    4. Program the DMA_DST_CTRL1 and DMA_DST_CTRL2 register as required.
  3. Start the indirect read in flash memory I/O controller by setting Indirect_Read_Ctrl [start] = 1. Wait until the DMA_DST_ISR [DONE] bit is set to check if the AXI command transfer has completed before accessing the data transferred to memory.