PMC Global Registers - PMC Global Registers - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The global registers serve several purposes.

  • Triple module redundant MicroBlazeâ„¢ processor controls, QoS for PPU on AXI
  • Storage registers (regular and persistent) and error storage for PLM firmware
  • Multiboot control
  • Mutex registers for processor software
  • Isolation and power supply storage
  • Power, isolation, reset, wake-up, and PL interrupt registers
  • DONE signal control, reset controls
  • Error management, firmware error storage registers
  • System error registers for PMC EAM
  • System interrupt registers
  • Soft error mitigation (SEM) in the PL configuration RAM (CRAM)

The platform service request registers allow system software to make power-up, power-down, isolation, and software reset requests by setting bits in the trigger registers.

The PMC global register set is accessed via a 32-bit APB programming interface that can be accessed by any permitted processor.