The BootROM sets configuration registers that apply to each boot mode. For octal SPI boot mode, the BootROM sets the registers to the initial values.
System Register Settings
| Register Name | Register Value | Description |
|---|---|---|
| CRP Clock and Reset Register Module | ||
| PMCPLL_CTRL |
0x0002_4800
|
PMC PLL (PPLL) setup uses reset defaults (REF_CLK multiplied by 72 (FBDIV) and divided by 4 (CLKOUTDIV)) |
| OSPI_REF_CTRL |
0x0100_0B00
|
Select PPLL divided by 11 (DIVISOR), clock enabled |
| RST_OSPI |
0x0000_0000
|
OSPI RST not asserted |
| PMC_IOP_SLCR Register Module | ||
| MIO_Bank0_Schmitt_en |
0x0000_17BF
|
Enable Schmitt on OSPI MIO pins |
| MIO_Bank0_Tristate |
0x03FF_E840
|
Disable 3-state override on OSPI MIO pins |
| OSPI_AXI_Sel |
0x0000_0001
|
OSPI selected |