Miscellaneous Configuration, Control, and User Registers - Miscellaneous Configuration, Control, and User Registers

Miscellaneous Configuration, Control, and User Registers - Miscellaneous Configuration, Control, and User Registers - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID

AM026

Release Date

2025-12-23

Revision

1.3 English

The USB miscellaneous configuration, control, and user registers are summarized in the following table.

Table 1. USB 2.0 Miscellaneous Configuration, Control, and User Registers
Register Name	Offset Address	Access Type	Description
GSBUSCFG0 GSBUSCFG1	`0x0_C100` `0x0_C104`	RW	Bus configuration
GCTL	`0x0_C110`	RW	Common control
GSTS	`0x0_C118`	R	Status
GUCTL1 GUCTL2	`0x0_C11C 0x0_C19C`	RW	User controls
GSNPSID	`0x0_C120`	Read only	ID register
GGPIO	`0x0_C124`	Mixed	General purpose I/O
GUID	`0x0_C128`	Read/Write	User ID
GUCTL	`0x0_C12C`	Read/Write	Global user control
GBUSERRADDRLO GBUSERRADDRHI	`0x0_C130 0x0_C134`	R	Bus address error
GHWPARAMS0 to GHWPARAMS7	`0x0_C140` to `0x0_C15C`	R	Implementation parameters
GDBGFIFOSPACE	`0x0_C160`	RW, R	Queue/FIFO space available
ULPI PHY
GUSB2PHYCFG	`0x0_C200`	Mixed	ULPI PHY configuration
GUSB2PHYACC_ULPI	`0x0_C280`	RW, R	ULPI PHY vendor control
RX/TX FIFO Depths
GTXFIFOSIZ0 GTXFIFOSIZ1 GTXFIFOSIZ2	`0x0_C300 0x0_C304 0x0_C308`	RW	RXFIFO 0, 1, 2 depths
GRXFIFOSIZ0 GRXFIFOSIZ1 GRXFIFOSIZ2	`0x0_C380 0x0_C384 0x0_C388`	RW	TXFIFO 0, 1, 2 depths
Event
GEVNTADRLO_0 GEVNTADRLO_2 GEVNTADRLO_3	`0x0_C400 0x0_C410 0x0_C420 0x0_C430`	RW
GEVNTADRHI_0 GEVNTADRHI_1 GEVNTADRHI_2 GEVNTADRHI_3	`0x0_C404 0x0_C414 0x0_C424 0x0_C434`	RW
GEVNTSIZ_0 GEVNTSIZ_1 GEVNTSIZ_2 GEVNTSIZ_3	`0x0_C408 0x0_C418 0x0_C428 0x0_C438`	RW
GEVNTCOUNT_0 GEVNTCOUNT_1 GEVNTCOUNT_2 GEVNTCOUNT_3	`0x0_C40C 0x0_C41C 0x0_C42C 0x0_C43C`	RW
Host Controls
GHWPARAMS8	`0x0_C600`	R	Implementation parameters
GTXFIFOPRIDEV	`0x0_C610`	RW	Device TXFIFO DMA priority
GTXFIFOPRIHST	`0x0_C618`	RW	Host TXFIFO DMA priority
GRXFIFOPRIHST	`0x0_C61C`	RW	Host RXFIFO DMA priority
GDMAHLRATIO	`0x0_C624`	RW	Host FIFO DMA high-low priority ratio
GFLADJ	`0x0_C630`	RW	Frame length adjustment