MIO and Dedicated I/O Banks - MIO and Dedicated I/O Banks - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The MIO banks provide I/O connectivity for the PMC and LPD. Each bank includes LVCMOS buffers with several programmable features. Three banks are for the multiplexed I/O (MIO) and one bank is for the PMC dedicated pins. The PMC and LPD MIO pins are attached to PSIO banks.

  • Bank 500:
    • PMC MIO bank 0 (26 pins)
  • Bank 501: PMC MIO bank 1 (26 pins)
  • Bank 502: LPD MIO bank (26 pins)
  • Bank 503: PMC dedicated digital pins

The PMC and LPD MIO pins are described in the Multiplexed I/O Signal Pins chapter. The dedicated pins are described in the Dedicated Pins chapter.