MIO Pin Routing - MIO Pin Routing - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The peripheral I/O signal routing is controlled by the PMC_IOP_SLCR and LPD_IOP_SLCR registers as described in this section.

A programming example is shown in the MIO Pin Programming Example section.