Interconnect Features - Interconnect Features - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The interconnect has dedicated 128, 256, and also 512-bit AXI channel connections between the subsystems. These include low-latency datapaths and high-throughput datapaths with buffering.

The interconnect optimizes the performance of the RPU and APU. The interconnect port connections are listed in this section.

PL to PS Datapaths

The PL has a datapath directly to the OCM interconnect switch and four PL pathways to each of the APU CPU clusters.

Low-latency Datapaths

  • APU to NoC: Cache mesh network (CMN) connections to the NoC
  • RPU to NoC: AXI egress port on OCM interconnect switch
  • RPU to OCM: AXI egress port on OCM interconnect switch
  • RPU to its TCMs: two cycle access with deterministic execution

High-throughput Datapaths

  • APU to NoC with four CMN egress ports
  • RPU to NoC with LPD main interconnect switch egress port
  • LPD DMA to FPD main interconnect switch

Cross-Subsystem Datapaths

  • APU to CMN to FPD main switch to OCM switch to OCM

Transaction Quality of Service

Each transaction includes a quality of service (QoS) traffic attribute that is defined by the transaction host or an ingress port to the interconnect. Some transaction hosts can dynamically generate more than one QoS depending on the source of the transaction. For example, reads and writes from a host can sometimes have different QoS values.

  • Isochronous for video and other time-sensitive transactions
  • Low latency for communications and other applications
  • Best effort, bulk traffic for large data sets without critical timing needs

The QoS attribute is recognized by the AMBA® switches and DDR memory controller. Improved system performance can be obtained by setting the QoS attributes appropriately. The setting mechanism can vary by functional unit and can be different for reads and writes.