The I3C interrupt register includes these bits:
- BUS_RESET_DONE_STS
- BUSOWNER_UPDATED_STS
- IBI_UPDATED_STS
- READ_REQ_RECV_STS
- DEFSLV_STS
- TRANSFER_ERR_STS
- DYN_ADDR_ASSGN_STS
- CCC_UPDATED_STS
- TRANSFER_ABORT_STS
- RESP_READY_STS
- CMD_QUEUE_READY_STS
- IBI_THLD_STS
- RX_THLD_STS
- TX_THLD_STS