The I3C controller supports the v1.0 standard and includes dynamic address assignment, data transfer to legacy I2C destinations, broadcast, and CCC transfers. The controller operates in the secondary configuration mode. Features include:
- I3C primary or secondary device roles
- FM, FM+, SDR, HDR-DDR data transfer modes
- Single port RAM support for Command and Data Buffers
- Supports up to 216 (65536) Write or Read bytes with a single command
- DMA buffer depths: Four command, four response, 32 transmit, and 32 receive
- Up to 11 addressable devices
- Up to 44 device characteristics table
- Eight in-band interrupt (IBI) status and 32 IBI payload entries
- IBHR patterns reset
- Hardware assisted dynamic address assignment (DAA) support
- Hardware assisted device role switching in secondary manager configuration
- Hot-join support with user controllable filter
- CRC/parity generation and validation
- Broadcast and directed CCC transfers
- 32-bit APB programming interface
Note: The I3C controller is a
combination of separate I2C and I3C controller logic. For all I2C interface
protocols, select the I2C controller logic.