I3C Controller Registers - I3C Controller Registers - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The registers are programmed by software through the APB programming interface.

Interrupt status and control registers detect events and monitor the system state to generate system interrupts. The controller does not generate a system error.

Note: All APB programmable interfaces require single 32-bit read and write transactions. Software should perform a read-modify-write to all registers that include a reserved or unknown bit field.