Host Capabilities, Offset, and Operations Registers - Host Capabilities, Offset, and Operations Registers

Host Capabilities, Offset, and Operations Registers - Host Capabilities, Offset, and Operations Registers - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID

AM026

Release Date

2025-12-23

Revision

1.3 English

The USB host capabilities, offset, and operations registers are located in the USB_XHCI register set at base address 0xFE20_0000. They are summarized in the following table.

CONFIG register
This register is in the AUX power well. It is only reset by the platform during a cold reset or in response to a host controller reset (HCRST).

Table 1. USB Host Capabilities, Offsets, and Operations Registers
Register Name	Offset Address	Access Type	Description
CAPLENGTH	`0x0000`	R	Length capability
HCSPARAMS1 HCSPARAMS2 HCSPARAMS3	`0x0004 0x0008 0x000C`	R	Host controller structural parameters
HCCPARAMS1 HCCPARAMS2	`0x0010 0x001C`	R	Host controller capability parameters
DBOFF	`0x0014`	R	Doorbell offset
RTSOFF	`0x0018`	R	Runtime offset
USBCMD	`0x0020`	RW	USB command
USBSTS	`0x0024`	R, W1C	USB status
PAGESIZE	`0x0028`	R	Page size
DNCTRL	`0x0034`	RW	Device notification
CRCR_LO CRCR_HI	`0x0038 0x003C`	RW, R
DCBAAP_LO DCBAAP_HI	`0x0050 0x0054`	RW	Device context BAAP
CONFIG	`0x0058`	RW	Configure