High-speed I/O Clocking - High-speed I/O Clocking - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The clock structure is shown in Clock Block Diagram. The registers to control the clock frequency and tap delays are shown in the figure in the Clock Block Diagram section.