HSDP Interface - HSDP Interface - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

High-Speed Debug Port (HSDP) provides a pathway to the PS-GTYP transceivers for the Aurora and provides debugging and trace capability. The HSDP interface supports 1-lane Aurora interface. The Debug Packet Controller (DPC) supports HSDP for processing packets from interfaces including HSDP Aurora and MDB5 controllers.