MPSoC to Versal Adaptive SoC GEM Comparisons
The AMD Versal™ adaptive SoC GEM interface is similar to the controller in the AMD Zynq™ UltraScale+™ MPSoC.
- Added features
- Time sensitive network (TSN)
- New RXFIFO high and low-level watermarks use pause frames for RX flow control
- Large segment offload (LSO) WANs added
- Removed features
- PS SGMII via PS GTR (PCS internal to GEM)
- 1000 BASE-x physical coding sublayer (PCS)
- Ten-bit interface (TBI) to PL via EMIO
GEM Implementations
The gigabit ethernet MAC (GEM) interface has remained mostly the same for all SoCs.
| Device Generation | GEM Controller | MIO Pins |
|---|---|---|
| UltraScale+ MPSoC | See above. | – |
| Versal device | GXL and RGMII (Cadence version r1p12). Two instances in PS LPD. | – |
| Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 | GXL and RGMII (Cadence version r1p12). Two instances in PS LPD. | RMII interface added and available on LPD MIO
pins MII interface added to EMIO interface |