The PS high-speed connectivity units are closely integrated with the processing system.
USB 3.2/DP/HDCP
PS high-speed connectivity peripherals support one USB 3.2 Gen 2x1 dual role device. This will allow the simultaneous transport of USB 3.2 Gen 2x1 (up to 10Gbps) and DP 1.4 with HDCP 2.3 (up to 4Kp60 or 8Kp30) traffic over a single USB Type-C connector. A display controller (DC) can send and receive stream data directly to/from the PL or can fetch video data from memory through a DMA engine.
The key features are summarized as follows:
- One instance – capable of x1 USB 3.2 Gen 2x1 configuration (10Gbps in each direction)
- DisplayPort 1.4 (DP)
- Support up to 8K video input @ 600Mhz with various formats
- eDP
- Video/audio/sdp input from the display controller
- Four lane PHY for USB 3.2, DP 1.4 including TX alt mode
- PCS/MUX/Type-C assist to support mode selection and cable flip
- 1x USB 2 Host PHY
- USB 3.2 controller to Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 through 128b AXI-MM bus
- A High-Bandwidth Digital Content Protection (HDCP) wrapper module with a True Random Number Generator (TRNG) block and a key management block (the module is connected to the AXI-S switch and the HDCP 2.3 controller)
- HDCP controller to Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 subsystem through 256b AXI-MM
Display Controller
A display controller (DC) can send and receive stream data directly to/from the PL or can fetch video data from memory through a DMA engine.
The key features of the DC block are summarized as follows:
- Supports blending, color space conversion, chroma sub-sampling and other video processing functions.
- Supports a single rendered video output at up to 4kp60 format
- Supports multiple streams from the PL at a cumulative rate of up to 8kp30
- Fetching video/graphics and audio, sdp data from memory and/or the PL and forward the combined video and audio stream to the DP/PL
- Supports seamless connection to a separate DisplayPort 1.4 TX interface, and/or stream to PL interface
- The Display Controller is connected to the PSXC via a 128-bit AXI-MM bus, and it provides DMA support for frame-buffer access to/from DDR
- The availability of access from PL interfaces is dependent on the device in the family
- Optionally provides video timing information (video timing
source) or use externally provided video timing values (video timing target)
- When operating as video timing target, only the PL can be a video timing source
- Provides timestamps of the A/V presentation time of memory-based A/V
- Supports Y-only (monochrome), RGB, YCbCr 4:4:4, YCbCr 4:2:2,
and YCbCr 4:2:0 (non-live mode and input bypass mode) video formats
- The output of TXDC shall support RGB or YCbCr 4:4:4, YCbCr 4:2:2, and YCbCr 4:2:0 (bypass mode)
- Supports color depths of 8, 10 and 12 bits per component
- Chroma up-sampling from YCbCr 4:2:0 to YCbCr 4:4:4, YCbCr 4:2:2 to YCbCr 4:4:4, YCbCr 4:2:0 to YCbCr 4:2:2
- Supports multiple frame buffer formats
- Buffer organizations: interleaved/packed versus planar and semi-planar
- Memory organization: raster versus tiled
- Pixel color depths: 8, 10, 12 bits
- Supports raster line stride and tiled format ‘pitch’
- Audio support
- Sample rates: up to 192KHz
- Channel count: up to 8 channels
- Sample size: 16, 20, 24 bits (20/24 bit samples are packed in a 32-bit container)
- Dynamic metadata support and support 48-bit system address space
- Dedicated AXI performance monitoring logic that measures the maximum, the minimum, and the average read latency.
- No FUSA or RAS support within the display controller
- Chroma sub-sampling and color depth conversion
PCIe and 10G Ethernet MAC
The submodule contains a 10G Ethernet MAC (10GbE) module capable of 10Gbps and two PCIe Gen5 capable controller modules that share a PS-GTYP quad along with the HSDP module.
A brief summary of the key features of the PCIe/10GbE subsystem is provided below:
- PCIe Gen5, downward compatible with PCIe Gen1, Gen2, Gen3, Gen4
- Two independent four lane controllers:
- 4-lane RC or EP
- Dual 2-lane RC or EP
- 2-lane RC + 2 lane EP
- 256b inbound and outbound AXI-MM bus from each PCIe controller
- Aurora HSDP @12.8 Gbps
- 1G/2.5G/5G/10G one lane ethernet interface with 128b AXI-MM bus to PSXC