Cache Interconnect Implementation - Cache Interconnect Implementation

Cache Interconnect Implementation - Cache Interconnect Implementation - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID

AM026

Release Date

2025-12-23

Revision

1.3 English

The following table lists the cache interconnect implementations.

Table 1. Cache Interconnect Implementations
Device Generation	Cache Interconnect
UltraScale+ MPSoC
Versal device	Cache coherent interconnect (CCI)
Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2	Arm CMN-600AE r1p0-02rel0