Buffer Descriptor Summary - Buffer Descriptor Summary - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English
  • Both the SRC and DST descriptors must be aligned to their size.
  • For efficiency, a DMA can prefetch a descriptor.
  • The circular descriptor should always have at least one link-list element.
  • Descriptors are not updated back to the memory. For instance, after a SRC/DST buffer descriptor is used by the DMA for data transfer, no updating of any field of SRC or DST buffer descriptor occurs to signal completion of a buffer descriptor to the software.
  • A completion interrupt, along with status (interrupt accounting), is supported. The software can read the content of PS_DMA.CH0_IRQ_SRC_CNT and PS_DMA.CH0_IRQ_DST_CNT registers to find the number of buffer descriptors processed.