The application processing unit (APU) is an array of multi-core, multi-cluster Arm® Cortex®-A78AE processors. The processor cores are arranged in up to 4 clusters with 2 or 4 cores per cluster. The two cores within a cluster can optionally be configured in lock-step mode.
The APU memory management unit (MMU), system MMU (SMMU), and cache mesh network (CMN) work together to provide a shared memory environment between the PS, PMC, and PL processors that can be tied to system-level caches (SLCs).
The APU processors can be used for computations, control-plane applications, operating systems, communications interfaces, and more. The TRM describes the architecture and the programming model for the APU functional units. Linux and bare-metal software stacks execute in the APU and RPU in a homogeneous or a heterogeneous environment. The APU software environment is described in the Versal Adaptive SoC System Software Developers Guide (UG1304) with links to other software development resources.