AXI Switch Feature Implementations - AXI Switch Feature Implementations - AM026

Versal AI Edge Series Gen 2 and Prime Series Gen 2 Technical Reference Manual (AM026)

Document ID
AM026
Release Date
2025-12-23
Revision
1.3 English

The AXI interconnect switch include the main switches in the FPD, LPD, and PMC. The following table lists the interconnect functional unit implementations.

Table 1. AXI Switch Feature Implementations
Device Generation Bus Isolation Timeout Transaction Integrity Error Checking
UltraScale+ MPSoC AXI isolation block (AIB) AXI timeout block (ATB)
Versal SoC ePort Isolation ePort switch timeout ePort and iPort parity
Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2 SoC