Detailed 3D thermal models for all Versal devices are available for download on the AMD website under the Device Models tab.
AMD offers and supports a suite of integrated device power analysis tools to help you quickly and accurately estimate your design power requirements.
The variability of design power requirements makes it difficult to apply predetermined thermal solutions to fit all designs. The estimated power of the device using the PDM, coupled with the your operating conditions and system constraints, dictate the appropriate solution. You must establish a thermal margin to account for the impact of the following (but not limited to) variations.
- Impact of the thermal sensor accuracy
- Impact of the power variation from one package to another package
- Impact of the manufacturing variation between fans
- Impact of the manufacturing variation between heat-sink fins
- Impact of the package manufacturing variation between heat-sink flatness
- Impact of the manufacturing variation of heat sink TIM contact/thickness
For example, when targeting maximum junction temperature (100°C) minus 8°C you must account for any additional system/environmental errors.
The detailed thermal model is a direct representation of the specified flip-chip BGA package. The model provides geometric details describing the package, specifically in regards to the lid, TIM, die, underfill, substrate, and solder balls or leads. Each specific component in the detailed model has material properties associated. When using this detailed model, several key facts must be considered:
- Two variations of the detailed thermal model are provided: Full detailed thermal model and simplified thermal model.
- The full detailed thermal model includes all intricate geometries of the physical package and allows mechanical evaluation of the device. However, simplified models are recommended for thermal simulations because detailed geometries create large meshes size and high-computation time with little to no gain in overall accuracy.
- The simplified detailed model removes geometries such as substrate trace layers and the stiffener ring. These features do not materially affect thermal simulation accuracy, but they significantly increase computation time. This simplified model uses a smaller mesh and reduces simulation computation time with less than a 5% difference in simulation accuracy from the full detailed model.
- The correct package top surface contact must be used when modeling the TIM on top of the detailed model. This is because the top surface contact can be smaller than the full package size.
- The junction temperature monitor point is at the die center by default. Junction temperature monitor points need to be positioned or added to the location of interest for your design.
- The uniform power defined in the die for the models provided is default power and does not apply to any specific cases. Power setting input is required.