zFx_ARI_CAP_NEXTPTR_17 (CPM5_PCIE_ATTR) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

zFx_ARI_CAP_NEXTPTR_17 (CPM5_PCIE_ATTR) Register Description

Register NamezFx_ARI_CAP_NEXTPTR_17
Offset Address0x0000001468
Absolute Address 0x00FCE09468 (CPM5_PCIE0_ATTR)
0x00FCE89468 (CPM5_PCIE1_ATTR)
Width32
TyperwNormal read/write
Reset Value0x00000000
DescriptionARI Next Capability Offset: Bits 31:20 ARI Extended Capability Header Register.

This register should only be written to during reset of the PCIe block

zFx_ARI_CAP_NEXTPTR_17 (CPM5_PCIE_ATTR) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
attr11:0rwNormal read/write0x0