ps_cpm_pcie_axi_power_main_ResilienceFaultController_LatentFault1 (CPM5_INT_GPV) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

ps_cpm_pcie_axi_power_main_ResilienceFaultController_LatentFault1 (CPM5_INT_GPV) Register Description

Register Nameps_cpm_pcie_axi_power_main_ResilienceFaultController_LatentFault1
Offset Address0x000000201C
Absolute Address 0x00FCD8201C (CPM5_INT_GPV)
Width32
TyperoRead-only
Reset Value0x00000000
DescriptionRegister LatentFault1

Alternate register name: if_ps_cpm_pcie_axi_power_main_ResilienceFaultController_LatentFault1

ps_cpm_pcie_axi_power_main_ResilienceFaultController_LatentFault1 (CPM5_INT_GPV) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
LatentFault131:0roRead-only0x0LatentFault1 register