por_mxp_errmisc_NS_u_smxp_1_1 (CPM5_CMN600) Register Description
| Register Name | por_mxp_errmisc_NS_u_smxp_1_1 |
|---|---|
| Offset Address | 0x000050B128 |
| Absolute Address | 0x00FC50B128 (CPM5_CMN) |
| Width | 64 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x00000000 |
| Description | Functions as the non-secure miscellaneous error register. Contains miscellaneous information about deferred/uncorrected errors. |
por_mxp_errmisc_NS_u_smxp_1_1 (CPM5_CMN600) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 63:59 | razRead as zero | 0x0 | reserved |
| TGTID | 58:48 | rwNormal read/write | 0x0 | Error flit target ID |
| Reserved | 47:22 | razRead as zero | 0x0 | reserved |
| OPCODE | 21:16 | rwNormal read/write | 0x0 | Error flit opcode |
| Reserved | 15 | razRead as zero | 0x0 | reserved |
| SRCID | 14:4 | rwNormal read/write | 0x0 | Error flit source ID |
| Reserved | 3 | razRead as zero | 0x0 | reserved |
| ERRSRC | 2:0 | rwNormal read/write | 0x0 | Error source Bits [2:1]: Transaction type 2b00: REQ 2b01: RSP 2b10: SNP 2b11: DAT Bit [0]: Port 1b0: Port 0 1b1: Port 1 |