por_hnf_slcway_partition3_rni_vec_u_hnf_nid40 (CPM5_CMN600) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

por_hnf_slcway_partition3_rni_vec_u_hnf_nid40 (CPM5_CMN600) Register Description

Register Namepor_hnf_slcway_partition3_rni_vec_u_hnf_nid40
Offset Address0x0000500C80
Absolute Address 0x00FC500C80 (CPM5_CMN)
Width64
TypemixedMixed types. See bit-field details.
Reset Value0xFFFFFFFF
DescriptionFunctions as the control register for RN-Is that can allocate to partition 3 (ways 12, 13, 14, and 15).

por_hnf_slcway_partition3_rni_vec_u_hnf_nid40 (CPM5_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
Reserved63:32razRead as zero0x0reserved
rni_vec331:0rwNormal read/write0xFFFFFFFFBit vector mask; identifies which logical IDs of the RN-I/RN-D can allocate