por_hnf_slcway_partition1_rnf_vec_u_hnf_nid40 (CPM5_CMN600) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

por_hnf_slcway_partition1_rnf_vec_u_hnf_nid40 (CPM5_CMN600) Register Description

Register Namepor_hnf_slcway_partition1_rnf_vec_u_hnf_nid40
Offset Address0x0000500C50
Absolute Address 0x00FC500C50 (CPM5_CMN)
Width64
TyperwNormal read/write
Reset Value0xFFFFFFFFFFFFFFFF
DescriptionFunctions as the control register for RN-Fs that can allocate to partition 1 (ways 4, 5, 6, and 7).

por_hnf_slcway_partition1_rnf_vec_u_hnf_nid40 (CPM5_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
rnf_vec163:0rwNormal read/write0xFFFFFFFFFFFFFFFFBit vector mask; identifies which logical IDs of the RN-F can allocate