por_dtm_fifo_entry2_0_u_smxp_1_1 (CPM5_CMN600) Register - AM012

Versal Adaptive SoC Register Reference (AM012)

Document ID
AM012
Release Date
2024-08-19
Revision
1.4

por_dtm_fifo_entry2_0_u_smxp_1_1 (CPM5_CMN600) Register Description

Register Namepor_dtm_fifo_entry2_0_u_smxp_1_1
Offset Address0x000050A150
Absolute Address 0x00FC50A150 (CPM5_CMN)
Width64
TyperoRead-only
Reset Value0x00000000
DescriptionContains DTM FIFO entry 2 data.

por_dtm_fifo_entry2_0_u_smxp_1_1 (CPM5_CMN600) Register Bit-Field Summary

Field NameBitsTypeReset ValueDescription
fifo_data063:0roRead-only0x0Entry data bit vector 63:0