por_dt_pmovsr_clr_u_hnd_nid8 (CPM4_CMN600) Register Description
| Register Name | por_dt_pmovsr_clr_u_hnd_nid8 |
|---|---|
| Offset Address | 0x0000132120 |
| Absolute Address | 0x00FC132120 (CPM4_CMN) |
| Width | 64 |
| Type | woWrite-only |
| Reset Value | 0x00000000 |
| Description | Clears the PMU overflow status. |
por_dt_pmovsr_clr_u_hnd_nid8 (CPM4_CMN600) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 63:9 | woWrite-only | 0x0 | reserved |
| pmovsr_clr | 8:0 | woWrite-only | 0x0 | Write a 1 to clear the corresponding bit in por_dt_pmovsr.pmovsr |