pciedma1_intlpd_axi (CPM4_INT_CSR) Register Description
| Register Name | pciedma1_intlpd_axi |
|---|---|
| Offset Address | 0x0000100000 |
| Absolute Address | 0x00FCC40000 (CPM4_INT_CSR) |
| Width | 32 |
| Type | mixedMixed types. See bit-field details. |
| Reset Value | 0x0000000B |
| Description | These registers control the Isolation and Reset of Master NIU corresponding to PCIE_DMA1 |
pciedma1_intlpd_axi (CPM4_INT_CSR) Register Bit-Field Summary
| Field Name | Bits | Type | Reset Value | Description |
|---|---|---|---|---|
| Reserved | 31:4 | rwNormal read/write | 0x0 | reserved |
| raw_rst_n | 3 | rwNormal read/write | 0x1 | 0: no effect 1: Resets the NIU in the switch corresponding to the ePort Note: Ensure that when this reset is asserted, the respective iPort also gets reset to ensure error free flow once reset gets released. |
| power_idlereq | 2 | rwNormal read/write | 0x0 | 0: no effect 1: Initiate an iPort isolation request |
| power_idleack | 1 | roRead-only | 0x1 | 0: idle request has not been detected 1: idle request has been detected Note: An NIU reset needs to be asserted to clear this bit. |
| power_idle | 0 | roRead-only | 0x1 | 0: iPort has not been isolated 1: iPort has been isolated Note: The reset needs to be asserted to clear this bit. |